Evolution of Computer Architecture 计算机体系的演变 The study of computer architecture involves bo

Evolution of Computer Architecture

计算机体系的演变

The study of computer architecture involves both hardware organization and programming/software requirements. As seen by an assembly language programmer, computer architecture is abstracted by its instruction set, which includes operation codes (opcode for short), addressing modes, registers, virtual memory, etc.

Legends:

I/E: Instruction Fetch and Execute

SIMD: Single Instruction Streams and Multiple Data Streams

MIMD: Multiple Instruction Streams and Multiple Data Streams Figure 1Tree Showing Architectural Evolution from Sequential Scalar Computers to Vector Processors and Parallel Computers

From the hardware implementation point of view, the abstract machine is organized with CPUs, caches, buses, microcodes, pipelines, physical memory, etc. Therefore, the study of architecture covers both instruction-set architectures and machine implementation organizations.

Over the past four decades, computer architecture has gone through evolutional rather than revolutional changes. Sustaining features are those that were proven performance deliverers, we started with the Von Neumann architecture^[1]built as a sequential machine executing scalar data. The sequential computer was improved from bit-serial to word- parallel operations, and from fixed-point to floating-point operations. The Von Neumann architecture is slow due to sequential execution of instructions in programs.

Lookahead, Parallelism and Pipelining^[2]

Lookahead techniques were introduced to prefetch instructions in order to overlap I/E (instruction fetch/decode and execution)^[3]operations and to enable functiorial parallelism. Functional parallelism was supported by two approaches: One is to use multiple functional units simultaneously, and the other is to practice pipelining at various processing levels.

The latter includes pipelined instruction execution, pipelined arithmetic computations, and memory-access operations. Pipelining has proven especially attractive in performing identical operations repeatedly over vector data strings. Vector operations were originally carried out implicitly by software-controlled looping using scalar pipeline processors.

Flynn's Classification^[4]

Flynn introduced a classification of various computer architectures based on notions of instruction and data streams in 1972. Conventional sequential machines are called SISD (single instruction stream over a single data stream)^[5]computers. Vector computers are equipped with scalar and vector hardware or appear as SIMD (single instruction stream over multiple data streams)^[6]machines. Parallel computers are reserved for MIMD (multiple Instruction streams over multiple data streams)^[7]machines.

An MISD (multiple instruction streams and a single data steam)^[8]machines are modeled. The same data stream flows through a linear array of processors executing different instruction streams. This architecture is also known as systolic arrays for pipelined execution of specific algorithms.

Of the four machine models, most parallel computers built in the past assumed the MIMD model for general-purpose computations. The SIMD and MISD models are more suitable for special-purpose computations. For this reason, MIMD is the most popular model, SIMD next, and MISD the least popular model being applied in commercial machines.

Parallel Computers

Intrinsic parallel computers are those that execute programs in MIMD mode. There are two major classes of parallel computers, namely, shared-memory multiprocessors and message-passing multicomputers. The major distinction between multiprocessors and multicomputers lies in memory sharing and the mechanisms used for interprocessor communication.

The processors in a multiprocessor system communicate with each other through shared variables in a common memory. Each computer node in a multicomputer system has a local memory, unshared with other nodes. Interprocessor communication is done through message passing among the nodes.

Explicit vector instructions were introduced with the appearance of vector processors. A vector processor is equipped with multiple vector pipelines that can be concurrently used under hardware or firmware control. There are two families of pipelined vector processors.

Memory-to-memory architecture supports the pipelined flow of vector operands directly from the memory to pipelines and then back to the memory. Register-to-register architecture uses vector registers to interface between the memory and functional pipelines.

Another important branch of the architecture tree consists of the SIMD computers for synchronized vector processing. An SIMD computer exploits spatial parallelism rather than temporal parallelism as in a pipelined computer. SIMD computing is achieved through the use of an array of processing elements synchronized by the same controller. Associative memory can be used to build SIMD associative processors.

Development Layers

Hardware configurations differ from machine to machine, even those of the same model. The address space of a processor in a computer system varies among different architectures. It depends on the memory organization, which is machine-dependent. These features are up to^[9]the designer and should match the target application domains.

On the other hand, we want to develop application programs and programming environments which are machine-independent. Independent of machine architecture, the user programs can be ported to many computers with minimum conversion costs. High- level languages and communication models depend on the architectural choices made in a computer system. From a programmer's viewpoint, these two layers should be architecture-transparent.

At present, Fortran, C, Pascal, Ada, and Lisp^[10]are supported by most computers. However, the communication models, shared variable versus message passing, are mostly machine-dependent. The Linda approach using tuple spaces offers any architecture- transparent communication model for parallel computers.

Application programmers prefer more architectural transparency. However, kernel programmers have to explore the opportunities supported by hardware. As a good computer architect, one has to approach the problem from both ends. The compilers and OS support should be designed to remove as many architectural constraints as possible from the programmer.

New Challenges

The technology of parallel processing is the outgrowth of four decades of research and industrial advances in microelectronics, printed circuits, high-density packaging, advanced processors, memory systems, peripheral devices, communication channels, language evolution, compiler sophistication, operating systems, programming environments, and application challenges.

The rapid progress made in hardware technology has significantly increased the economical feasibility of building a new generation of computers adopting parallel processing. However, the major barrier preventing parallel processing from entering the production mainstream is on the software and application side.

To date, it is still very difficult and painful to program parallel and vector computers^[11]. We need to strive for major progress in the software area in order to create a user-friendly environment for high-power computers. A whole new generation of programmers need to be trained to program parallelism effectively. High-performance computers provide fast and accurate solutions to scientific, engineering, business, social, and defense problems.

Representative real-life problems include weather forecast modeling, computer-aided design of VLSI^[12]circuits, large-scale database management, artificial intelligence, crime control, and strategic defense initiatives, just to name a few. The application domains of parallel processing computers are expanding steadily. With a good understanding of scalable computer architectures and mastery of parallel programming techniques the reader will be better prepared to face future computing challenges.

Notes

[1] the Von Neumann architecture: 冯·诺依曼体系结构，由匈牙利科学家Von Neumann于1946年提出。其基本思想是“存储程序”的概念，即把程序与数据存放在线性编址的存储器中，依次取出，进行解释和执行。

[2] Lookahead, Parallelism and Pipelining: 先行(预见)、并行性和流水线技术(管线)。

[3] I/E (instruction fetch/decode and execution)：取指令(指令去还)。

[4] Flynn Classification：弗林分类法，M.J. 弗林于1966年提出的、根据系统的指令和数据对计算机系统进行分类的一种方法。

[5] SISD(single instruction stream over a single data stream)：单指令单数据流(或single instruction single data).

[6] SIMD (single instruction stream over multiple data streams)：单指令多数据流(或single instruction multiple data).

[7] MIMD (multiple Instruction streams over multiple data streams)：多指令多数据流(或multiple Instruction multiple data).

[8] MISD (multiple instruction streams and a single data steam)：多指令单数据流(或multiple instruction single data).

[9] up to：应由某人担任或负责。如：It is up to them to decide. 应由他们决定。这一句可译为“这些特性由设计者考虑决定”。

[10] Fortran, C, Pascal, Ada, and Lisp: (分别是)Fortran语言、C语言、Pascal语言、Ada语言和Lisp语言。

[11] vector computers：向量计算机；向量电脑；一种数组计算机(an array computer)。

[12] VLSI: very large scale integration超大规模集成电路；大规模积体电路。